This invention relates generally to programmable circuits for performing logic operations and, in particular, to a programmable circuit having a matrix with crossed first and second sets of lines connected through a respective resistor to an operating voltage source and also having logic units connected at intersections between the first and second lines.
Various types of programmable circuits for implementing logic operations are known in the prior art (see, for example, Weiss, Horninger, Integrierte MOS Schaultungen, Springer Verlag 1982, pp. 295 through 298). These programmable circuits typically contain an AND level of circuitry and an OR level of circuitry. Input signals are received by the programmable circuit in the AND level and are stored in the AND level in accordance with a function table. The operation results of the AND level, also referred to as product terms, are supplied to the OR level and are operated thereon in accord with the function table contained in the OR level to form what are referred to as sum terms. The sum terms are the output of the OR level and also the output of the programmable circuit. Therefore, such a prior art programmable circuit has input lines which lead to the AND level and has output lines which lead from the OR level.
The present invention overcomes the restrictions of the prior art that certain lines are always input lines and other lines are always output lines.